The selfassembling computer chips of the future Karl Skjonnemand

Computers used to be as big as a room.

But now they fit in your pocket,

on your wrist

and can even be implanted
inside of your body.

How cool is that?

And this has been enabled
by the miniaturization of transistors,

which are the tiny switches
in the circuits

at the heart of our computers.

And it’s been achieved
through decades of development

and breakthroughs
in science and engineering

and of billions of dollars of investment.

But it’s given us
vast amounts of computing,

huge amounts of memory

and the digital revolution
that we all experience and enjoy today.

But the bad news is,

we’re about to hit a digital roadblock,

as the rate of miniaturization
of transistors is slowing down.

And this is happening
at exactly the same time

as our innovation in software
is continuing relentlessly

with artificial intelligence and big data.

And our devices regularly perform
facial recognition or augment our reality

or even drive cars down
our treacherous, chaotic roads.

It’s amazing.

But if we don’t keep up
with the appetite of our software,

we could reach a point
in the development of our technology

where the things that we could do
with software could, in fact, be limited

by our hardware.

We’ve all experienced the frustration
of an old smartphone or tablet

grinding slowly to a halt over time

under the ever-increasing weight
of software updates and new features.

And it worked just fine
when we bought it not so long ago.

But the hungry software engineers
have eaten up all the hardware capacity

over time.

The semiconductor industry
is very well aware of this

and is working on
all sorts of creative solutions,

such as going beyond transistors
to quantum computing

or even working with transistors
in alternative architectures

such as neural networks

to make more robust
and efficient circuits.

But these approaches
will take quite some time,

and we’re really looking for a much more
immediate solution to this problem.

The reason why the rate of miniaturization
of transistors is slowing down

is due to the ever-increasing complexity
of the manufacturing process.

The transistor used to be
a big, bulky device,

until the invent of the integrated circuit

based on pure crystalline silicon wafers.

And after 50 years
of continuous development,

we can now achieve
transistor features dimensions

down to 10 nanometers.

You can fit more than
a billion transistors

in a single square millimeter of silicon.

And to put this into perspective:

a human hair is 100 microns across.

A red blood cell,
which is essentially invisible,

is eight microns across,

and you can place 12 across
the width of a human hair.

But a transistor, in comparison,
is much smaller,

at a tiny fraction of a micron across.

You could place more than 260 transistors

across a single red blood cell

or more than 3,000 across
the width of a human hair.

It really is incredible nanotechnology
in your pocket right now.

And besides the obvious benefit

of being able to place more,
smaller transistors on a chip,

smaller transistors are faster switches,

and smaller transistors are also
more efficient switches.

So this combination has given us

lower cost, higher performance
and higher efficiency electronics

that we all enjoy today.

To manufacture these integrated circuits,

the transistors are built up
layer by layer,

on a pure crystalline silicon wafer.

And in an oversimplified sense,

every tiny feature
of the circuit is projected

onto the surface of the silicon wafer

and recorded in a light-sensitive material

and then etched through
the light-sensitive material

to leave the pattern
in the underlying layers.

And this process has been
dramatically improved over the years

to give the electronics
performance we have today.

But as the transistor features
get smaller and smaller,

we’re really approaching
the physical limitations

of this manufacturing technique.

The latest systems
for doing this patterning

have become so complex

that they reportedly cost
more than 100 million dollars each.

And semiconductor factories
contain dozens of these machines.

So people are seriously questioning:
Is this approach long-term viable?

But we believe we can do
this chip manufacturing

in a totally different
and much more cost-effective way

using molecular engineering
and mimicking nature

down at the nanoscale dimensions
of our transistors.

As I said, the conventional manufacturing
takes every tiny feature of the circuit

and projects it onto the silicon.

But if you look at the structure
of an integrated circuit,

the transistor arrays,

many of the features are repeated
millions of times.

It’s a highly periodic structure.

So we want to take advantage
of this periodicity

in our alternative
manufacturing technique.

We want to use self-assembling materials

to naturally form the periodic structures

that we need for our transistors.

We do this with the materials,

then the materials do the hard work
of the fine patterning,

rather than pushing the projection
technology to its limits and beyond.

Self-assembly is seen in nature
in many different places,

from lipid membranes to cell structures,

so we do know it can be a robust solution.

If it’s good enough for nature,
it should be good enough for us.

So we want to take this naturally
occurring, robust self-assembly

and use it for the manufacturing
of our semiconductor technology.

One type of self-assemble material –

it’s called a block co-polymer –

consists of two polymer chains
just a few tens of nanometers in length.

But these chains hate each other.

They repel each other,

very much like oil and water
or my teenage son and daughter.

(Laughter)

But we cruelly bond them together,

creating an inbuilt
frustration in the system,

as they try to separate from each other.

And in the bulk material,
there are billions of these,

and the similar components
try to stick together,

and the opposing components
try to separate from each other

at the same time.

And this has a built-in frustration,
a tension in the system.

So it moves around, it squirms
until a shape is formed.

And the natural self-assembled shape
that is formed is nanoscale,

it’s regular, it’s periodic,
and it’s long range,

which is exactly what we need
for our transistor arrays.

So we can use molecular engineering

to design different shapes
of different sizes

and of different periodicities.

So for example, if we take
a symmetrical molecule,

where the two polymer chains
are similar length,

the natural self-assembled
structure that is formed

is a long, meandering line,

very much like a fingerprint.

And the width of the fingerprint lines

and the distance between them

is determined by the lengths
of our polymer chains

but also the level of built-in
frustration in the system.

And we can even create
more elaborate structures

if we use unsymmetrical molecules,

where one polymer chain
is significantly shorter than the other.

And the self-assembled structure
that forms in this case

is with the shorter chains
forming a tight ball in the middle,

and it’s surrounded by the longer,
opposing polymer chains,

forming a natural cylinder.

And the size of this cylinder

and the distance between
the cylinders, the periodicity,

is again determined by how long
we make the polymer chains

and the level of built-in frustration.

So in other words, we’re using
molecular engineering

to self-assemble nanoscale structures

that can be lines or cylinders
the size and periodicity of our design.

We’re using chemistry,
chemical engineering,

to manufacture the nanoscale features
that we need for our transistors.

But the ability
to self-assemble these structures

only takes us half of the way,

because we still need
to position these structures

where we want the transistors
in the integrated circuit.

But we can do this relatively easily

using wide guide structures that pin down
the self-assembled structures,

anchoring them in place

and forcing the rest
of the self-assembled structures

to lie parallel,

aligned with our guide structure.

For example, if we want to make
a fine, 40-nanometer line,

which is very difficult to manufacture
with conventional projection technology,

we can manufacture
a 120-nanometer guide structure

with normal projection technology,

and this structure will align three
of the 40-nanometer lines in between.

So the materials are doing
the most difficult fine patterning.

And we call this whole approach
“directed self-assembly.”

The challenge with directed self-assembly

is that the whole system
needs to align almost perfectly,

because any tiny defect in the structure
could cause a transistor failure.

And because there are billions
of transistors in our circuit,

we need an almost
molecularly perfect system.

But we’re going to extraordinary measures

to achieve this,

from the cleanliness of our chemistry

to the careful processing
of these materials

in the semiconductor factory

to remove even the smallest
nanoscopic defects.

So directed self-assembly
is an exciting new disruptive technology,

but it is still in the development stage.

But we’re growing in confidence
that we could, in fact, introduce it

to the semiconductor industry

as a revolutionary new
manufacturing process

in just the next few years.

And if we can do this,
if we’re successful,

we’ll be able to continue

with the cost-effective
miniaturization of transistors,

continue with the spectacular
expansion of computing

and the digital revolution.

And what’s more, this could even
be the dawn of a new era

of molecular manufacturing.

How cool is that?

Thank you.

(Applause)